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| CML Semiconductor Products PRODUCT INFORMATION FX002 Signal to Noise Enhancer Publication D/002/2 July 1994 Features Applications Up to 8.5dB Signal-to-Noise Radio Communications and Improvement Paging Systems Input Frequency Range: 17Hz to 13kHz Tone Detection [Sub-Audio and Audio Frequencies] Sonar Detection and Analysis Low-Voltage Operation: 2.5 Volts Slow Data-Rate Communications 10mVrms Minimum Signal Input Medical Equipment Digital Output Signal (fIN x 4) Interference Investigation `Divided-Down' Clock Outputs SIGNAL BIAS SIGNAL IN + DELAY 48-BIT COMPARE LOGIC INTERPOLATE DELAY 24-BIT OUTPUT [4 x SIGNAL IN] OUTPUT LOGIC VDD DELAY 48-BIT COMPARE LOGIC INTERPOLATE VSS AUTOCORRELATION PROCESS DELAY 24-BIT FX002 CLOCK OUTPUT 6 CLOCKS XTAL/CLOCK XTAL/CLOCK GENERATOR/ DIVIDER XTAL CLOCK OUTPUT 24 Fig.1 Functional Block Diagram Brief Description The FX002 is a single-chip device to extract single periodic signals from very high random-noise environments. Using patented autocorrelation techniques the FX002 will enhance the input signal's signal-to-noise ratio by as much as 8.5dB and provide a digital output signal centred at four times (x4) the input frequency. The amplitude of non-periodic components of the signal is substantially reduced. The patented autocorrelator compares the incoming signal to itself; the more elements of the waveform that are seen as periodic, the higher the energy at the microcircuit output. The FX002 cascades two autocorrelators, each one improving the signal-to-noise ratio. 1 With a random noise input the output will swing rail-to-rail at random (peak-limited). The input/output signal delay is fixed by the choice of clock frequency and the length of the internal register. The FX002 will operate at supply voltages of between 2.5 volts and 5.5 volts and with Xtal/clock frequencies from 20kHz to 2.5MHz. Using various Xtal/clock inputs the device can be set to accept input signal frequencies, in bands, from 17.0Hz to 13.0kHz. Two uncommited clock outputs are available to supply 'divided-down' Xtal/clock frequencies for use in external and peripheral functions. This low-power signal processing device is available in 16-pin cerdip dual-in-line (DIL) and plastic small outline (S.O.I.C.) surface mount packages. Pin Number FX002DW FX002J 1 1 Function Signal In: The inverting input to the analogue amplifier/comparator. Used with the Signal Bias pin; external coupling components are required (see Figure 2). 3 3 Signal Bias: The output of the analogue amplifier/comparator. Do not load this pin with peripheral circuitry; there is no drive capacity for off-chip signalling. The feedback resistor should be not less than 200k. See Figure 2. 4 4 VDD: Positive supply rail. A single, stable power supply is required. Note that this device has two VDD pins; this input is positioned to prevent cross-talk, either or both may be connected to the host circuit's supply line. Do not attempt to draw current from either VDD pin. Clock/24: A squarewave output clock signal at the rate of Xtal/clock/24; provided for peripheral and test purposes. 5 5 6 6 Xtal: The output of the on-chip clock oscillator inverter. 8 7 Xtal/Clock: The input to the on-chip clock oscillator inverter; this may be a Xtal, resonator or clock pulse input. The selection of this frequency will affect the operational input signal bandwidth (and output frequency) of this device; refer to Table 2. Note that the choice of VDD will determine the maximum Xtal/clock frequency and hence the maximum useable signal input frequency. Operation of any CML microcircuit without an active Xtal or clock input may cause device damage. A clock pulse input is fed directly into this pin; Xtal/clock components are not required. Table 1 provides a guide to maximum usable Xtal/clock frequencies at pre-determined VDD values. Max. Xtal/Clock VDD (V) Freq. (MHz) 2.5 0.625 Table 1 3.0 1.0 5.0 2.5 9 9 VSS: Negative supply rail (GND). Clock/6: A squarewave output clock signal at the rate of Xtal/clock/6; provided for peripheral and test purposes. 11 11 13 13 Output: (fOUT = 4 x fSIGNAL IN). The auto-correlated output signal at four times (x 4) the input signal (see Figure 4). There is a time delay between input and output signals (see Specifications). 16 16 VDD: Positive supply rail. A single, stable power supply is required. Note that this device has two VDD pins; either or both may be connected to the host circuit's supply line. Do not attempt to draw current from either VDD pin. The choice of VDD will determine the maximum Xtal/clock frequency and hence the maximum useable signal input frequency (see Figure 3). No internal connection. Leave open-circuit. 2, 7, 10, 12, 14, 15 2, 8, 10, 12, 14, 15 2 Application Information External Components VDD C5 SIGNAL INPUT SIGNAL IN C1 x SIGNAL BIAS VDD R1 XTAL/CLOCK OUTPUT 4 XTAL XTAL 6 1 2 3 4 5 6 7 8 16 15 14 x x VDD VSS FX002J 13 12 11 10 9 x x OUTPUT (f = 4 x SIGNAL IN) CLOCK OUTPUT 6 C3 X1 R2 C4 C2 VSS XTAL/CLOCK 7 XTAL/CLOCK x VSS VSS Fig.2 Recommended External Components Xtal/Clock Freq. (kHz) 20 100 200 300 400 500 560 600 700 800 900 1000 2000 2500 Input Freq. (Hz) Min Max 17 88 166 250 333 416 467 500 583 667 750 833 1667 2083 105 526 1052 1579 2105 2632 2947 3158 3684 4210 4737 5263 10526 13157 BW (Hz) 88 443 886 1329 1772 2216 2480 2658 3101 3543 3987 4430 8859 11074 Component R1 R2 C1 C2 C3 C4 C5 X1 X1 range Value for VDD = 5.0V 2.2M 1.0M 0.01F 47.0pF -see below 47.0pF -see below 5 - 65pF -see below 1.0F 560kHz resonator 20kHz to 2.5MHz Table 3 Recommended External Components Xtal/Clock Components C4 is suggested for frequency setting when using a resonator; when a Xtal is used C4 is omitted. Values of capacitors C2 and C3 should be reduced for higher Xtal frequencies and/or lower supply voltages (VDD). Maximum Input Frequency (Hz) Table 2 Input Signal Ranges vs Xtal/Clock Frequency 14000 Minimum Input Frequency = Xtal/Clock Frequency (Hz) 1200 Maximum Input Frequency = Xtal/Clock Frequency (Hz) 190 For VDD = 5.0V 12000 Input Signal Frequency (Hz) 10000 8000 Maximum Clock Limit at VDD = 3.0V 6000 Maximum Clock Limit at VDD = 2.5V Input Signal Bandwidth (Hz) 4000 2000 Minimum Input Frequency (Hz) 0 0 500 1000 1500 2000 2500 Fig.3 Examples of Input Signal Ranges vs Xtal/Clock Frequency 3 Xtal/Clock Frequency (kHz) Application Information ...... Level Frequency fSIGNAL SIGNAL IN IN fOUT = 4 x fSIGNAL SIGNAL OUT IN Fig.4 Example FX002 Input/Output Relationships The diagrams in Figure 4 are example spectrums of the input and output signal conditions of the FX002. Note that the frequency of the output signal is four times (x4) that of the input signal. The graph shown in Figure 5 illustrates the signal-to-noise enhancement that can be obtained, under varying input conditions, from the FX002. Effective Output Signal-to-Noise Ratio (dB) 9 8 7 6 5 4 3 2 1 Input Signal = 2.7kHz 20mVrms Xtal/Clock Frequency 500kHz VDD = 5.0V -6 -5 -4 -3 -2 -1 0 1 2 Input Signal-to-Noise Ratio (dB) 3 4 5 6 7 8 Fig.5 Enhancement of Signal-To-Noise Ratio 4 Specification Absolute Maximum Ratings Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits is not implied. Supply voltage -0.3 to 7.0V Input voltage at any pin (ref VSS = 0V) -0.3 to (VDD + 0.3V) Sink/source current (supply pins) +/- 30mA (other pins) +/- 20mA Total device dissipation @ TAMB 25C 800mW Max. Derating 10mW/C Operating temperature range: FX002DW FX002J Storage temperature range: FX002DW FX002J -40C to +85C -40C to +85C -40C to +85C -55C to +125C Operating Limits Correct operation of the device outside these limits is not implied. Remarks Supply Voltage (VDD) Operating Temperature Xtal/Clock Frequency Note 1 (VDD = 2.5V) (VDD = 5.0V) Min. 2.5 -40.0 20.0 0.02 Max. 5.5 +85.0 625 2.5 Unit V C kHz MHz Operating Characteristics All device characteristics are measured under the following conditions unless otherwise specified: VDD = 5.0V, TAMB = 25C. Xtal/Clock Frequency = 560kHz. Input Test Signal = 1.0kHz at 200mVrms. Characteristics Static Values Supply Current (IDD) Output Logic `1' Output Logic `0' Digital Output Impedance Dynamic Values Signal Input Levels Analogue (Input) Amplifier Gain See Note Min. 80% 10.0 20.0 9.0 10.0 35.0 4.0 2.5 500 1/1200 - Typ. 1.0 4.0 4.0 20.0 1.4 1/6 Max. 2.5 20% 10.0 1000 4.0 20.0 3000 1/190 - Unit mA mA VDD VDD k mVrms dB dB dB % MHz kHz Hz Xtal/Clock ms Xtal/Clock 2 3 4 5 6 Recommended Input Signal Mark-to-Space Ratio Freq. In/Freq. Out Ratio Maximum Xtal/Clock Frequency 1 Minimum Xtal/Clock Frequency Frequency Input Range (Xtal/Clock = 560kHz) (Table 2) 7 Input to Output Delay 8 Output Resolution Notes 1. Maximum Xtal/clock frquency allowed varies with applied supply voltage (VDD). 2. IDD requirement for Xtal/clock frequency of 2.24MHz. 3. Signal input level required to provide a constant autocorrelated output. 4. Measured with a 6.0kHz sinewave at the signal input. 5. Measured with VDD = 2.5 volts. 6. Measured with a 12kHz input signal. 7. Recommended input signal frequency range to correlation circuits. 8. Input (Signal In) to output (Output) time with a 2.24MHz Xtal/clock input. 5 Package Outlines The FX002 is available in the package styles outlined below. Mechanical package diagrams and specifications are detailed in Section 10 of this document. Pin 1 identification marking is shown on the relevant diagram and pins on all package styles number anti-clockwise when viewed from the top. Handling Precautions The FX002 is a CMOS LSI circuit which includes input protection. However precautions should be taken to prevent static discharges which may cause damage. FX002DW 16-pin plastic S.O.I.C. (D4) FX002J 16-pin cerdip DIL (J2) NOT TO SCALE NOT TO SCALE Max. Body Length Max. Body Width 10.49mm 7.59mm Max. Body Length Max. Body Width 19.48mm 7.39mm Ordering Information FX002DW FX002J 16-pin plastic S.O.I.C. 16-pin cerdip DIL (D4) (J2) CML does not assume any responsibility for the use of any circuitry described. No circuit patent licences are implied and CML reserves the right at any time without notice to change the said circuitry. 6 |
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